Three years, three SoCs – SoC Hub’s journey explained
…platform with EDA tools and technology libraries, as well as making necessary agreements. After this, the actual SoC design work could begin. “Our main objective was to tape out one… […]
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Workshop: Accelerating Imaging Algorithms with Catapult High-Level Synthesis
…optimized memory architecture (60 minutes) Wrap-up (15 minutes) Your Instructors Mike Fingeroff HLS Technologist for the Catapult HLS Platform at Siemens EDA (formally Mentor Graphics) since 2002. His areas… […]
Open position at Tampere University: University Instructor (System-on-Chip Design)
…machines, and imaging. Nokia designs the most advanced chips in Europe for 5G on the latest IC technology nodes in Finland, and Industry 4.0 companies has big potential for custom… […]
How to become a System-on-Chip design expert? – SoC education at Tampere University
…supply chains. Therefore, increasing skills in the SoC field will increase the security and decrease dependence on other countries. SoCs also have potential to increase data security. Build your expertise… […]
OpenASIP 2.0 released by Tampere University
…customized RISC-V processor generation and is used to automatize the design, generation and programming of the DSP processors integrated to the SoC Hub test chips. Read more here … […]
Edu4Chip enhances European chip design capability with a master’s programme covering the complete chip design flow
…from the high-level description of the hardware and ending with the actual manufacturing (i.e., tape-out) and test of their chips. Trainees in the programme will also have the opportunity to… […]
The second System-on-Chip developed by SoC Hub has been taped out
…and after that, a successful chip wake-up testing was carried out. Most of the key functionalities were brought up in record breaking time of one day from receiving the chips… […]
What is an ASIC and how to build one?
…platforms. Our courses have utilized Field Programmable Gate Array (FPGA) chips which are good for prototyping, but often in the industry setting the target platform is application-specific integrated circuit (ASIC)… […]
SoC Hub takes part in the development of European RISC-V ecosystem in TRISTAN project
…bring design space exploration to a virtual platform by connecting a digital twin of the real machinery to SoC simulators. TRISTAN in The Community Research and Development Information Service… […]
Webinar: Ballast true story – The development of the first SoC Hub chip
…is a complex and multifaceted process that requires versatile expertise and integration skills. Putting efforts in SoC design can give companies significant competitive advantage. Couple of years ago, SoC Hub… […]
