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What is FPGA prototyping?

…be booted. The main difference between the FPGA prototype and the actual chip is the performance: if the clock speed of the chip would be 1 GHz then the FPGA… […]

Workshop: Embedded Linux on a RISC-V processor

…The workshop begins with building Linux and an appropriate bootloader for a specific RISC-V chipset. The operating system build is then evaluated on an emulator, and same builds are also… […]

Three years, three SoCs – SoC Hub’s journey explained

…the need to boost SoC development expertise in Finland and started making action plans with the project’s main partner, Nokia. Setting up the virtual organization for the project consortium started… […]

Open doctoral researcher position at Tampere University

…hired researcher. The researcher will work in collaboration with SoC Hub, a strategic ecosystem created by Tampere University together with a consortium of local businesses to boost research and education… […]

The second System-on-Chip developed by SoC Hub has been taped out

…to the CPU boot. The major prerequisites for the project, such as the infrastructure and the agreements, were set up before the first tape-out and this enabled the development of… […]

SoC Hub takes part in the development of European RISC-V ecosystem in TRISTAN project

…aims at creating open source HW and SW components as well as open-source tools to boost European competence on chip designs. The focus is on RISC-V based System-on-Chips (SoC) that… […]

Siemens EDA webinar on 20 June: Managing the Complexity of an HEVC Encoder (Kvazaar) Implementation on FPGA with Catapult HLS

…Catapult HLS. Their implementation shows that HLS is able to boost the development time and still result in competitive performance and QoR over state-of-the-art hardware implementations. What will you learn:… […]

Finnish system-on-chip design gets stronger as Tampere’s SoC Hub co-creators prepare to unveil a new system-on-chip tapeout

…design educator in Finland. Tampere has a long history as a base for system-on-chip design in Finland. This expertise has been further boosted by the System-on-Chip Hub project, which was… […]

Workshop: Accelerating Imaging Algorithms with Catapult High-Level Synthesis

…author of the premier textbook for using HLS for design “The High-Level Synthesis (HLS) Blue Book”. Russell Klein HLS technologist for the Catapult HLS Platform at Siemens EDA (formally Mentor… […]

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