Tampere University is seeking 2-3 assistant, associate, or full professors for a broad sense of System-on-Chip (SoC) design and HW/SW implementation technologies for High-Performance Computing (HPC). The positions are placed in the Faculty of Information Technology and Communication Sciences at Tampere University in the Unit of Computing Sciences (CS). The CS unit covers the full range of IT research and education areas: Human Technology Interaction, SW engineering, Mathematics, Data Science, Signal Processing, Computer Engineering and Network and Information Security, including 46 professors and over 400 staff members. The new positions are located to the Computer Engineering research area.
Tampere University, Tampere City and Pirkanmaa region released Chips from Finland initiative leading to strengthening EU’s Chips Act design excellence in the region that has strong business cluster around wireless communications, intelligent machines and imaging. Tampere University was recently granted a six-years Academy of Finland Profiling action “Silicon2Action” combining System-on-Chip, Wireless Communications and Robotics. System-on-Chip Hub (SoC Hub) was started in 2019 to become one of the top design sites in Europe. The success is based on a three-decade expertise on FPGA and DSP based multiprocessor system designs in collaboration with industry. Nokia designs the most advanced chips in Europe for 5G on the latest IC technology nodes in Finland, and Industry 4.0 companies has big potential for custom chips differentiating and securing the competitiveness. To meet industrial challenges, SoC Hub focuses on large, top quality prototype chips in the smallest geometries and aiming at high technology readiness level TRL6 onwards. SoC Hub created a unique co-working model in which over 70 experts from the university and companies carry out the SoC design daily. The promise of one large SoC per year has been proven with over 130M transistor chips from 2021. We use open source and custom Intellectual Property (IP) blocks and a mixture of open source and commercial EDA tools. IP-blocks include our own openasip.org DSP cores, RISC-V cores, network-on-chip, AI and crypto accelerators, and high-speed interfaces. Our own SoC tools include the famous open-source IP-XACT-based Kactus2. An example of the applications is full HW implementation of Kvazaar HEVC video encoder.
The positions expand the current research to create innovative architectures and components for contemporary applications and using the most modern tools and methodologies. We look forward to collaboration among the new positions in a complementary way. We search candidates for the following topics and working profiles on the field:
- System-on-Chip architectures and implementations. This topic aims at modeling and designing optimized signal processing, wireless communications, security, or robotics algorithms for SoC, tto connect different abstraction levels on application development and chip design. The expected outcomes are, for example, new models, design space exploration results, architectures, and IP-block designs.
- System-on-Chip design methods, tools, and processes. The topic aims at research on methodologies, Electronic Design Automation (EDA) tools, ASIC backend design, and physical implementation of the chips. We value the passion to learn and lead the technology development for the latest digital ASIC technologies down to Ångström level geometries and new integration approaches like System-in-Package that must be considered also in the system level design.
- High performance real-time computing. The topic aims at creating high performance computing blocks for SoCs under very high real-time and energy consumption constraints. The work may include modeling, profiling, and mapping of the algorithms on advanced DSP, GPU and processor architectures, and contribute to the HW design of custom IP-blocks and subsystems. The applications can focus on graphics rendering, video processing, machine learning, or specific fields of High-Performance Computing that call for custom chip designs.
The final profile of the position can be tailored according to your specific expertise and may include, for example, some of the following key topics:
- System-on-Chip architectures, On-chip networks, RISC-V, Post-Quantum Security, AI, Approximate computing
- Methodologies like functional formal verification and ASIC modelling
- Application of AI to design flow, IP-XACT based design automation, open-source EDA tools
- SoC design for Chiplets and Heterogeneous Integration
- Quantum computer interfacing
- Low-power design and energy efficient architectures
- Sustainability aspects like SoC design for long life-cycle, re-usability and second purposing
In general, our tenure track staff are expected to:
- pursue and supervise scientific research in the field,
- lead, conduct and develop research-led teaching, curriculum development and student supervision
- seek, secure and manage research funding from different sources e.g. EU instruments
- demonstrate effective academic leadership and engage with external stakeholders